68040 integer module

@inproceedings{citeulike:2948796, abstract = {The central CPU for the 68040 processor is the integer unit (IU). The IU contains multiple 32-bit data and address paths with heavily pipelined instruction execution control for improved performance. Frequently used instructions and addressing modes have been optimized for single cycle execution. Additionally, independent control for each pipe state yields increased throughput. Implementation of control structures for increased performance is presented, with emphasis on design trade-offs for automated logic synthesis versus full custom, hand crafted circuits. The impact of the integration of test logic on behavioral descriptions and control logic testing strategy are discussed}, author = {Holden, K. and Eisele, R. and Kobe, M. and Raleigh, J. and Spohrer, T. }, booktitle = {Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings., 1990 IEEE International Conference on}, citeulike-article-id = {2948796}, doi = {10.1109/ICCD.1990.130197}, journal = {Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings., 1990 IEEE International Conference on}, keywords = {68000, 68040, architecture, integer}, pages = {183--186}, posted-at = {2008-07-01 17:05:49}, priority = {2}, title = {68040 integer module}, url = {http://dx.doi.org/10.1109/ICCD.1990.130197}, year = {1990} }

TY - CONF ID - citeulike:2948796 L3 - citeulike-article-id:2948796 TI - 68040 integer module T2 - Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings., 1990 IEEE International Conference on JF - Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings., 1990 IEEE International Conference on SP - 183 EP - 186 N2 - The central CPU for the 68040 processor is the integer unit (IU). The IU contains multiple 32-bit data and address paths with heavily pipelined instruction execution control for improved performance. Frequently used instructions and addressing modes have been optimized for single cycle execution. Additionally, independent control for each pipe state yields increased throughput. Implementation of control structures for increased performance is presented, with emphasis on design trade-offs for automated logic synthesis versus full custom, hand crafted circuits. The impact of the integration of test logic on behavioral descriptions and control logic testing strategy are discussed KW - 68000 KW - 68040 KW - architecture KW - integer AU - Holden, K AU - Eisele, R AU - Kobe, M AU - Raleigh, J AU - Spohrer, T PY - 1990/// UR - http://dx.doi.org/10.1109/ICCD.1990.130197 ER -